Computer systems often employ magnetic disc drives to store information such as computer programs or data. Magnetic disc drives typically include a transducing data head mounted on a slider that "flies" over the surface of a rotating rigid magnetic disc. The data head is positioned over a selected portion of the disc by a drive controller operating an actuator. The data head generates magnetic fields which are impressed onto the disc surface during the writing of information and senses magnetic fields from the disc surface during the readback of information.
The head writes digital data to the disc, for example, through modulation of a current in a head coil where the current corresponds with the magnetic flux transitions that represent the digital data. When reading the recorded data, the head again passes over the disc surface and transduces the magnetic transitions into voltage pulses in an analog read signal. The written data sequence is recovered after processing of the analog read signal.
Prior to recording data on a disc surface, the digital data bits are encoded so that certain constraints are enforced on the bit stream impressed on the disc. Encoding the data provides clocking and automatic gain control information, which is used for data recovery. To perform the timing and gain control, the number of consecutive "zero" samples of the bit stream is limited because timing and control information is preferably derived when non-zero samples are read. For example, (d,k) run-length-limited (RLL) codes separate "1"s by at least d and at most k, "0"s. Prior art codes, for example those used in Partial Response class IV channels, utilize intersymbol interference (ISI) in such a manner as to make unnecessary the d constraint, i.e., d=0. The k constraint is still required to provide timing and control information. Errors in sequence detectors arise mostly due to the detector's inability to distinguish the minimum distance transition patterns. A (1,k) code can be used to eliminate the minimum distance error event in certain detectors, but the rate penalty is typically too large to provide any appreciable coding gain unless the linear density is very high.
A particular code, now known in the art, that improves the minimum distance properties of maximum likelihood sequence detectors operating at higher linear densities is called the Maximum Transition Run (MTR) code. An example of such an MTR code is set forth in Jaekyun Moon and Barrett Brickner, "Maximum Transition Run Codes for Data Storage Systems," 32 IEEE Transactions on Magnetics, 3992 (September 1996). In certain cases, the MTR code possesses the similar beneficial distance-gaining properties of the (1, k) code over the (0,k) code, but can be implemented with appreciably higher rates. The MTR code eliminates data patterns producing three or more consecutive transitions while imposing a k constraint to assure that the gain and timing loops are updated with adequate frequency. For example, a (2;9) MTR code with rate 6/7, which encodes binary data represented as a six bit data byte into a seven bit code word, used in connection with a non-return-to-zero-inverse (NRZI) modulation convention, has been developed.
One approach to detection in an informational handling system such as a magnetic disc drive is to use a geometric interpretation in which each of m observation variables corresponds to a coordinate in m-dimensional space. The space is then divided into regions corresponding to possible outputs. This concept has been used to design fixed delay tree search with decision feedback (FDTS/DF) detectors. The procedure for designing FDTS/DF as a high dimensional detector includes finding boundaries in space for various pairs of symbols corresponding with different detector outputs, eliminating those boundaries that are redundant, and mapping the regions in space formed by the boundaries to the detector output via a logic function.
Decision boundary design and boundary selection are important considerations in the implementation of FDTS/DF detectors. An optimum decision boundary for a pair of symbols corresponding to different detector outputs is everywhere equidistant from the two points. Once the boundaries are determined, the complexity of the detector can be reduced with the removal of some selected boundaries without degrading the detector performance significantly. For example, the boundaries corresponding to the more distant pairs of symbols can be eliminated. To determine which boundaries can be eliminated, a rank order list of boundaries is determined. First, the boundaries are listed in order of increasing distance from the symbol pair that generated the boundary. Then, the boundaries are removed in order of decreasing distance until the performance of the detector begins to degrade.
A detector structure implementing a design similar to that described above has been developed and is known in the art as a Full FDTS/DF detector. This detector for an RLL d=0 coded channel includes five multipliers providing seven decisional boundaries to a logic circuit.
In addition to improved performance over prior art detectors, the Full FDTS/DF detector is characterized by its complexity. Particularly, the five multipliers and related hardware are relatively cumbersome to implement, as is the logic circuit to which seven boundaries are provided. In order to simplify detector architecture, those skilled in the art have sought to effect the performance of a Full FDTS/DF detector through the use of less than all of its decisional boundaries, i.e., a subset of the seven decisional boundaries of the Full FDTS/DF detector.
A simplified detection system which is based on a subset of three decisional boundaries of the Full FDTS/DF detector has been developed. The simplified detection system is premised on the realization that the Full FDTS/DF detector is sensitive to changes in the channel response that alter which set of symbol pairs constitute the smallest set. To fix the symbol pairs that generate the required boundaries, a constraint can be placed on the channel impulse response. The natural (i.e., unconstrained) channel response at user densities of 2.5 indicates that the first two samples are nearly equal, and the third sample is close to zero. Consequently, to operate at a density of 2.5, equalization of the impulse response can be constrained to the target values of 1, 1 and 0. The constrained pulse response results in constrained decisional boundaries. Application of the equalization target to the Full FDTS/DF results in a simplified detector where the constrained boundaries can be determined without multipliers.
A channel to implement this simplified detection system has been proposed, and is referred to in the art as a "3D-110" channel. In the 3D-110 channel, a filter is used to remove all the precursor intersymbol interference (ISI) terms. All post-cursor ISI terms except the first two, are removed using a feedback filter. The channel constrains the two remaining post-cursor ISI terms, i.e., f.sub.1 and f.sub.2, to be one and zero. The main tap, i.e., f.sub.0, of the pulse response is normalized to one, and, assuming all previous decisions to be correct, the filters result in an equivalent discrete time channel with a "110" response for f.sub.0, f.sub.1 and f.sub.2.
The detector of the 3D-110 channel is a simplified implementation of the Full FDTS/DF detector. When the three dimensional FDTS/DF described above is provided with a "110" response and MTR coding, the result is a detector which makes use of only three decisional boundaries, as opposed to seven. Furthermore, the detector does not require multipliers and one of the decisional boundaries has a zero offset term. The 3D-110 detector uses three slicers, three adders, and two two-input multiplexers to provide three decisional boundaries to a logic circuit. Thus, the 3D-110 detector can be constructed with a dramatically simplified architecture over the Full FDTS/DF detector. However, the 3D-110 detector operates in the same way a Full FDTS/DF detector would if provided with a "110" response and MTR coding. The overall steps for deriving the 3D-110 detector architecture from the Full FDTS/DF implementation are determining channel impulse response, appropriately constraining the channel impulse response, and simplifying the architecture based on the constraint where only a subset of the original seven boundaries remain.
The 3D-110 channel provides significant advantages in performance and simplicity over other detectors. The 3D-110 channel achieves the performance of the more complicated Full FDTS/DF (of depth 2) at high densities, i.e, densities of 2.5 and above. However, the Full FDTS/DF detector outperforms the 3D-110 channel at lower densities. The "110" target carried out in the 3D-110 channel is close to the magnetic channel natural response at high densities, but is not particularly suited for use at lower densities, i.e., densities less than 2.25.
Consequently, a need exists for a channel that has improved performance over prior art detectors at both high and low densities but which can be implemented in a more simplified architecture than the Full FDTS/DF detector. The present invention is directed to a system that provides a solution to this and other problems, and offers other advantages over the prior art.